We are looking for Key Openings with our Prestigious Clients in Bangalore, Hyderabad, Pune, Noida.
If you wish to explore, Please share your CV @ newsoft@nsoftindia.com to discuss further details...

#RTL #Verification #STA #UVM #SystemVerilog #DFT #ATPG #LBIST #MBIST #SCAN #JTAG #Validation #PhysicalDesign #PHP, #Python #MachineLearning #ComputerVision

Designation - Sr. Engineer, Tech Lead, Architect, Project Manager
Location - Bangalore, Hyderabad, Pune, Noida
Exp. – 3-15 Years

Open Position -
1. RTL Design [4-15 Years]
2. Verification [SoC/ IP/ AMS] [3-15 Years]
3. STA [4-10 Years]
4. DFT [ATPG, SCAN, DFT] [3-12 Years]
5. Physical Design [3-12 Years]
6. Post Si. Validation [5-15 Years]
7. Compiler Development [2-6 Years]
8. C++, CUDA, Python [3-8 Years]
9. Machine Learning Framework Development [3-8 Years]
10. Android Framework Development [3-8 Years]
11. PHP Developer [3-7 Years]

#Excellent Opportunity For #M.Tech #Trained #Freshers For Noida And Bangalore Location :

1: #RTL Design Engineer ( #Noida Location)
2: #Verification Engineer ( #Noida Location)
3: #DFT Engineer ( #Bangalore Location)
4: #Embedded Engineer ( #Noida Location, #Preferred if you are in #North Location only)
5: #Physical Design Engineers ( #Noida Location, Preferred if you are in #North Location only)

Please share your resume on madhuri.tomar@incise.in

We are Hiring!!! #TRUECHIP

#Hiring #IP & #SOC #Verification Engineers
Experience: 1.5+ years(Relevant Experience- Excluding internships & trainings)
Notice Period: Immediate to 1 Month
Location: #Bangalore/ #Noida/ #Hyderabad/ #Pune
Interested candidates can share their resume at, medha.gaur@truechip.net

#URGENTLY Hiring- Verification Lead -USB, PCIe, Ethernet, DDR (4-15 Yrs) in Bangalore, Hyderabad, Noida; Please share your CV @ newsoft@nsoftindia.com to discuss...
#hiring #Verification #UVM #Verilog #SystemVerilog #USB #DDR #PCIe #Ethernet #AXI #AHB

https://lnkd.in/dtakdDH

I am #Hiring for Top Product Based MNC (#Semiconductor company) for #Bangalore, #Hyderabad & #Chennai Location

#GLV - Gate Level Verification Engineer with 5-9yrs – Bangalore Location
#RTL Design Engineer with 5-9yrs – Bangalore Location
#Validation Engineer (with #LabView and #TestStand ) with 1-3yrs – Bangalore Location
#PSV -Silicon Validation Engineer with 5-8yrs – Hyderabad Location
#CAE - Embedded Application Engineer with 4-12yrs – Chennai Location
#Analoglayout Engineer with 5-8yrs – Hyderabad Location

Interested candidates please drop your CV to sst2@aimplusstaffing.com

#vlsi #verification #rtl, #validation, #designengineer #embeddedsoftware #analogdesign

Warm Regards,
Poojary Deepika |Senior Recruitment Executive
|https://lnkd.in/g2-xcAE

Aim Plus Staffing Solutions - Bangalore | New Delhi

#Excellent Opportunity For #M.Tech #Trained #Freshers For #Noida Location :

1: #RTL Design Engineer
2: #Verification Engineer
3: #DFT Engineer
4: #Embedded Engineer ( #Preferred if you are in #North Location only)
5: #Physical Design Engineers (Preferred if you are in #North Location only)

Please share your resume on madhuri.tomar@incise.in

#Excellent Opportunity For #M.Tech #Trained #Freshers For Noida Location :

1: #RTL Design Engineer
2: #Verification Engineer
3: #DFT Engineer
4: #Embedded Engineer ( #Preferred if you are in #North Location only)
5: #Physical Design Engineers ( Preferred if you are in #North Location only)

Please share your resume on Shubhanshi@incise.in

Microchip Technology is conducting an interview for the post of #Verification #Engineer.
Bangalore
Requirements - * Bachelor’s degree or higher with #Electronics in your course work
https://careers.microchip.com/job/1323/verification_engineer
Job Requirements
Bachelor’s degree or higher with Electronics in your course work
Must have good problem-solving skills
Good understanding of digital design fundamentals
Knowledge of Unix/Linux based systems, as well as scripting languages like Perl/python, is an added advantage
Knowledge of Verilog/System Verilog hardware description language is an added advantage
Good communication skills with work ethics

Greetings from #Adeptchips!!!
We are hiring #Verification Engineers!!!
Experience Req : 6 + Years
Interested may send resumes to santoshkumar.baradi@adeptchips.com

#Hiring #VLSI #RTL #PD #Memory #DFT #Analog #Verification #Semiconductor #VLSIjobs #vlsidesign
https://www.instagram.com/p/CQDEBOohgdY/?utm_medium=share_sheet

Genpact is hiring..!

Background verification role (2-3 years of experience)
Experience in recruitment + BGC is preferable.
Basic excel skills(Pivot, vlookup)
Location- Delhi NCR (on site )
Job type: Contract

Share your resumes at yashika.sharma2@genpact.com
#backgroundchecks #backgroundscreening #onboarding #verification