XILINX,Hyderabad Hiring engineers with the following skills.

1)Physical design Manager :13-18Yrs
2)STA : (13+years)
3)FPGA Prototyping,Emulation:12+Yrs
4) IP Verification Engineers :5+Yrs
5) Post Silicon validation ,PCIE: 7+Yrs
6) PCB Package : 12+Yrs
7) DDR Verification :5+Yrs
8) MIPI Verification : 6+Yrs
9) Coherency Verification :12+Yrs
10)EDA Software Engineer :3+Yrs
11) Emulation Lead :13+yrs
12) RTL Design :4+Yrs
13) Embedded Device driver developer : 7+Yrs
14) Physical Design : 5+Yrs
15)Machine learning :4+Yrs

# #verification #pcie #systemverilog #uvm #systemverilog #ethernet #xilinxhyderabad #physicaldesign #sta #timinganalysis #fpgaprototype #fpgavalidation #pnrcad #rtldesign #dft #fullcustomdesign

Interested candidates can reachout to shalini.recharla@xilinx.com

SpicaWorks is hiring the following Skills interested hurry up and share your resume to krishnapriya@spicaworks.com

Design Verification : 4+ years (Strong in SV ,UVM) ( Immediate /Notice Period )
Physical Design : 4+ years ( Immediate /Notice Period )
DFT Engineers : 3+ years ( Immediate /Notice Period )
Physical Verifications : 4+ years ( Immediate /Notice Period )
AMS Verification : 4+ years (Immediate /15 days )

#verification #systemverilog #uvm #pcie #designverification #asicdesign #ovm #dv #ddr #ethernet #socverification #asicverification #physicaldesign #pd #icc #icc2 #primetime #sta #synthesis #DFT #atpg #mbist #physicalverification

Recruiting Physical Design Leaders for opportunities across India.

For other exciting opportunities visit https://vhunt4u.com/

Follow Vhunt4u for updates on international hiring opportunities.

#semiconductor #semiconductorindustry #semiconductors #skillindia #workfromhome #workfromanywhere #physicaldesign #asicdesign #bangalore #punejobs #kolkatajobs #hyderabadjobs #soc #vlsijobs

Greetings from SIART DESIGN SYSTEMS, Bangalore, India !!

We have an opening for 3 to 8 years experienced Physical Design Engineers who can join immediately or within 15-20 days.

Job Description:
Working on 16nm and below advanced process project APR and sign-off
Take the TOP and PM role for the complicated hierarchical chip (more than 20m plus 500+ macros)
Take the Block coordinator role for more than 10 blocks, solving the critical issue and give the solution to block owner
Do early prediction for critical issues when project start
Requirement
APR hands-on experience with complicated hierarchical chip (more than 20m instance)
TCL/Perl/script/C/C++ programming skill
Have advanced process tapeout experience (T6 is needed, and N7 is a plus)
Excellent communication

Interested can share their CV at hr@siartdesign.com

#job #bangalore #design #vlsi #physicaldesign @Bengaluru_Jobs
#physicalverification #hardware #engineer #urgent #immediate #semiconductor #apr #perl #c++ #script #tcl #c

#Wipro currently Hiring for #vlsi #Engineers for below skills
#experience : 4+yrs
#bangalore #cochin #pune #hyderabad #greaternoida

#physicaldesign
#designverification
#verification
#dft
#sta
#rtldesign
#asicdesign
#fpgadesign with #3GPP

Interested Applicants can share resumes to email ID: mohammed.umar3@wipro.com

#Excellent Opportunity For #M.Tech #Trained #Freshers For Noida And Bangalore Location :

1: #RTL Design Engineer ( #Noida Location)
2: #Verification Engineer ( #Noida Location)
3: #DFT Engineer ( #Bangalore Location)
4: #Embedded Engineer ( #Noida Location, #Preferred if you are in #North Location only)
5: #Physical Design Engineers ( #Noida Location, Preferred if you are in #North Location only)

Please share your resume on madhuri.tomar@incise.in
#Incise #embeddedsystems #embeddedjobs #noida #embeddedsoftware #freshersopportunity #vlsijobs #rtldesign #verifications #physicaldesign #freshersjob #fresherhiring

We are looking for Key Openings with our Prestigious Clients in Bangalore, Hyderabad, Pune, Noida.
If you wish to explore, Please share your CV @ newsoft@nsoftindia.com to discuss further details...

#RTL #Verification #STA #UVM #SystemVerilog #DFT #ATPG #LBIST #MBIST #SCAN #JTAG #Validation #PhysicalDesign #PHP, #Python #MachineLearning #ComputerVision

Designation - Sr. Engineer, Tech Lead, Architect, Project Manager
Location - Bangalore, Hyderabad, Pune, Noida
Exp. – 3-15 Years

Open Position -
1. RTL Design [4-15 Years]
2. Verification [SoC/ IP/ AMS] [3-15 Years]
3. STA [4-10 Years]
4. DFT [ATPG, SCAN, DFT] [3-12 Years]
5. Physical Design [3-12 Years]
6. Post Si. Validation [5-15 Years]
7. Compiler Development [2-6 Years]
8. C++, CUDA, Python [3-8 Years]
9. Machine Learning Framework Development [3-8 Years]
10. Android Framework Development [3-8 Years]
11. PHP Developer [3-7 Years]

Hi All,

Come! be a Part of our wonderful team and grab the opportunity to build a fantastic career with team sisoc.

We have below urgent requirements.

1.#soc or #IP Verification Engineer
2. #physicaldesign Engineer

Experience - 1Year to 20Years

Notice Period - immediate to Two Weeks

Work Locations - Bengaluru and Hyderabad

Salary -Hike on current and best in industry(Not a Constraint)

Please like, comment & share this post so that it can reach the deserving candidates

Interested, Kindly share resumes to surendra.potti@sisocsemi.com

Hi All,
Greetings from ACL Digital!!
Hiring for VLSI Engineers for Bangalore and Hyderabad locations.

SOC/ IP Verification - 5+ years
Physical Design- 5+ years
DFT Engineer- 5+ years
ASIC RTL Design- 8+ years

#UVM #Verilog #SV #SOC #IP #PCIE #ASIC #VLSI #physicaldesign #sta #lvs #drc #lint #cdc #asicdesign
Kindly share resumes to chiranjeevi.k@acldigital.com

Hello Jobseekers,

Greetings from DPIIND…!

DPIIND Services Private Limited #MegaWeekendDrive for #PhysicalDesign/ #STA TRAINED FRESHERS on 27 July 2024 – Saturday.
Details are below.. Please join us fantastic technical team to full fill your dreams.
Welcoming you to be part of our family.