XILINX,Hyderabad Hiring engineers with the following skills.
1)Physical design Manager :13-18Yrs
2)STA : (13+years)
3)FPGA Prototyping,Emulation:12+Yrs
4) IP Verification Engineers :5+Yrs
5) Post Silicon validation ,PCIE: 7+Yrs
6) PCB Package : 12+Yrs
7) DDR Verification :5+Yrs
8) MIPI Verification : 6+Yrs
9) Coherency Verification :12+Yrs
10)EDA Software Engineer :3+Yrs
11) Emulation Lead :13+yrs
12) RTL Design :4+Yrs
13) Embedded Device driver developer : 7+Yrs
14) Physical Design : 5+Yrs
15)Machine learning :4+Yrs
# #verification #pcie #systemverilog #uvm #systemverilog #ethernet #xilinxhyderabad #physicaldesign #sta #timinganalysis #fpgaprototype #fpgavalidation #pnrcad #rtldesign #dft #fullcustomdesign
Interested candidates can reachout to shalini.recharla@xilinx.com
1)Physical design Manager :13-18Yrs
2)STA : (13+years)
3)FPGA Prototyping,Emulation:12+Yrs
4) IP Verification Engineers :5+Yrs
5) Post Silicon validation ,PCIE: 7+Yrs
6) PCB Package : 12+Yrs
7) DDR Verification :5+Yrs
8) MIPI Verification : 6+Yrs
9) Coherency Verification :12+Yrs
10)EDA Software Engineer :3+Yrs
11) Emulation Lead :13+yrs
12) RTL Design :4+Yrs
13) Embedded Device driver developer : 7+Yrs
14) Physical Design : 5+Yrs
15)Machine learning :4+Yrs
# #verification #pcie #systemverilog #uvm #systemverilog #ethernet #xilinxhyderabad #physicaldesign #sta #timinganalysis #fpgaprototype #fpgavalidation #pnrcad #rtldesign #dft #fullcustomdesign
Interested candidates can reachout to shalini.recharla@xilinx.com
SpicaWorks is hiring the following Skills interested hurry up and share your resume to krishnapriya@spicaworks.com
Design Verification : 4+ years (Strong in SV ,UVM) ( Immediate /Notice Period )
Physical Design : 4+ years ( Immediate /Notice Period )
DFT Engineers : 3+ years ( Immediate /Notice Period )
Physical Verifications : 4+ years ( Immediate /Notice Period )
AMS Verification : 4+ years (Immediate /15 days )
#verification #systemverilog #uvm #pcie #designverification #asicdesign #ovm #dv #ddr #ethernet #socverification #asicverification #physicaldesign #pd #icc #icc2 #primetime #sta #synthesis #DFT #atpg #mbist #physicalverification
Design Verification : 4+ years (Strong in SV ,UVM) ( Immediate /Notice Period )
Physical Design : 4+ years ( Immediate /Notice Period )
DFT Engineers : 3+ years ( Immediate /Notice Period )
Physical Verifications : 4+ years ( Immediate /Notice Period )
AMS Verification : 4+ years (Immediate /15 days )
#verification #systemverilog #uvm #pcie #designverification #asicdesign #ovm #dv #ddr #ethernet #socverification #asicverification #physicaldesign #pd #icc #icc2 #primetime #sta #synthesis #DFT #atpg #mbist #physicalverification
#Wipro currently Hiring for #vlsi #Engineers for below skills
#experience : 4+yrs
#bangalore #cochin #pune #hyderabad #greaternoida
#physicaldesign
#designverification
#verification
#dft
#sta
#rtldesign
#asicdesign
#fpgadesign with #3GPP
Interested Applicants can share resumes to email ID: mohammed.umar3@wipro.com
#experience : 4+yrs
#bangalore #cochin #pune #hyderabad #greaternoida
#physicaldesign
#designverification
#verification
#dft
#sta
#rtldesign
#asicdesign
#fpgadesign with #3GPP
Interested Applicants can share resumes to email ID: mohammed.umar3@wipro.com
Hello, MeyvnSystems now is hiring for #Singapore looking for #Physical Design Engineer (#PnR & #STA Synthesis) with (5-12) Years of exp. #VISA will be taken care for candidates outside Singapore.
Please feel free to contact via WhatsApp, Email or Call at your convenience.
Deven Kr.
e: devenkr@meyvnsystems.com |
m: +91 9591577342 |
w: www.meyvnsystems.com |
Please feel free to contact via WhatsApp, Email or Call at your convenience.
Deven Kr.
e: devenkr@meyvnsystems.com |
m: +91 9591577342 |
w: www.meyvnsystems.com |
We are looking for Key Openings with our Prestigious Clients in Bangalore, Hyderabad, Pune, Noida.
If you wish to explore, Please share your CV @ newsoft@nsoftindia.com to discuss further details...
#RTL #Verification #STA #UVM #SystemVerilog #DFT #ATPG #LBIST #MBIST #SCAN #JTAG #Validation #PhysicalDesign #PHP, #Python #MachineLearning #ComputerVision
Designation - Sr. Engineer, Tech Lead, Architect, Project Manager
Location - Bangalore, Hyderabad, Pune, Noida
Exp. – 3-15 Years
Open Position -
1. RTL Design [4-15 Years]
2. Verification [SoC/ IP/ AMS] [3-15 Years]
3. STA [4-10 Years]
4. DFT [ATPG, SCAN, DFT] [3-12 Years]
5. Physical Design [3-12 Years]
6. Post Si. Validation [5-15 Years]
7. Compiler Development [2-6 Years]
8. C++, CUDA, Python [3-8 Years]
9. Machine Learning Framework Development [3-8 Years]
10. Android Framework Development [3-8 Years]
11. PHP Developer [3-7 Years]
If you wish to explore, Please share your CV @ newsoft@nsoftindia.com to discuss further details...
#RTL #Verification #STA #UVM #SystemVerilog #DFT #ATPG #LBIST #MBIST #SCAN #JTAG #Validation #PhysicalDesign #PHP, #Python #MachineLearning #ComputerVision
Designation - Sr. Engineer, Tech Lead, Architect, Project Manager
Location - Bangalore, Hyderabad, Pune, Noida
Exp. – 3-15 Years
Open Position -
1. RTL Design [4-15 Years]
2. Verification [SoC/ IP/ AMS] [3-15 Years]
3. STA [4-10 Years]
4. DFT [ATPG, SCAN, DFT] [3-12 Years]
5. Physical Design [3-12 Years]
6. Post Si. Validation [5-15 Years]
7. Compiler Development [2-6 Years]
8. C++, CUDA, Python [3-8 Years]
9. Machine Learning Framework Development [3-8 Years]
10. Android Framework Development [3-8 Years]
11. PHP Developer [3-7 Years]
#BITSILICA is hiring for Physical Design roles
Exp :: 2+ Yrs
Location :: Hyderabad & Bangalore.
Skills ::
Strong on #Floorplanning & #PnR
Skilled in #Synthesis, #STA & #Lowpower
Knowledge on IR Drop, Signal Integrity & Redhawk
Interested Professionals can share resume to balamurali.k@bitsilica.com
Exp :: 2+ Yrs
Location :: Hyderabad & Bangalore.
Skills ::
Strong on #Floorplanning & #PnR
Skilled in #Synthesis, #STA & #Lowpower
Knowledge on IR Drop, Signal Integrity & Redhawk
Interested Professionals can share resume to balamurali.k@bitsilica.com
Forwarded from Bengaluru Jobs & Careers (Siva Ganesan)
Hi All,
Greetings from ACL Digital!!
Hiring for VLSI Engineers for Bangalore and Hyderabad locations.
SOC/ IP Verification - 5+ years
Physical Design- 5+ years
DFT Engineer- 5+ years
ASIC RTL Design- 8+ years
#UVM #Verilog #SV #SOC #IP #PCIE #ASIC #VLSI #physicaldesign #sta #lvs #drc #lint #cdc #asicdesign
Kindly share resumes tochiranjeevi.k@acldigital.com
Greetings from ACL Digital!!
Hiring for VLSI Engineers for Bangalore and Hyderabad locations.
SOC/ IP Verification - 5+ years
Physical Design- 5+ years
DFT Engineer- 5+ years
ASIC RTL Design- 8+ years
#UVM #Verilog #SV #SOC #IP #PCIE #ASIC #VLSI #physicaldesign #sta #lvs #drc #lint #cdc #asicdesign
Kindly share resumes to
Forwarded from Freshers Jobs & Careers
Hello Jobseekers,
Greetings from DPIIND…!
DPIIND Services Private Limited #MegaWeekendDrive for #PhysicalDesign/ #STA TRAINED FRESHERS on 27 July 2024 – Saturday.
Details are below.. Please join us fantastic technical team to full fill your dreams.
Welcoming you to be part of our family.
Greetings from DPIIND…!
DPIIND Services Private Limited #MegaWeekendDrive for #PhysicalDesign/ #STA TRAINED FRESHERS on 27 July 2024 – Saturday.
Details are below.. Please join us fantastic technical team to full fill your dreams.
Welcoming you to be part of our family.