✨LUT-LLM: Efficient Large Language Model Inference with Memory-based Computations on FPGAs

📝 Summary:
LUT-LLM is an FPGA accelerator for LLM inference that leverages on-chip memory to shift computation from arithmetic to memory-based operations via table lookups. This innovative approach achieves 1.66x lower latency than AMD MI210 and 1.72x higher energy efficiency than NVIDIA A100 for a 1.7B LLM.

🔹 Publication Date: Published on Nov 9

🔹 Paper Links:
• arXiv Page: https://arxiv.org/abs/2511.06174
• PDF: https://arxiv.org/pdf/2511.06174

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#LLM #FPGA #AI #DeepLearning #AIHardware

✨AutoNeural: Co-Designing Vision-Language Models for NPU Inference

📝 Summary:
AutoNeural is an NPU-native VLM co-designed for efficient edge inference. It uses a MobileNetV5-style vision backbone for stable integer quantization and a hybrid SSM-Transformer language backbone. This design reduces quantization errors and latency, improving real-time performance on edge devices.

🔹 Publication Date: Published on Dec 2

🔹 Paper Links:
• arXiv Page: https://arxiv.org/abs/2512.02924
• PDF: https://arxiv.org/pdf/2512.02924

🔹 Models citing this paper:
• https://huggingface.co/NexaAI/AutoNeural

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#AutoNeural #VisionLanguageModels #EdgeAI #AIHardware #EfficientAI

✨Vectorizing the Trie: Efficient Constrained Decoding for LLM-based Generative Retrieval on Accelerators

📝 Summary:
STATIC accelerates constrained decoding for LLM generative retrieval on hardware accelerators. It transforms prefix trees into sparse matrices, vectorizing operations for massive speedups and low latency. This enables the first production-scale deployment of strictly constrained generative retrie...

🔹 Publication Date: Published on Feb 26

🔹 Paper Links:
• arXiv Page: https://arxiv.org/abs/2602.22647
• PDF: https://arxiv.org/pdf/2602.22647

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#LLM #GenerativeAI #ConstrainedDecoding #AIHardware #DeepLearning