Recruiting Physical Design Leaders for opportunities across India.

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#semiconductor #semiconductorindustry #semiconductors #skillindia #workfromhome #workfromanywhere #physicaldesign #asicdesign #bangalore #punejobs #kolkatajobs #hyderabadjobs #soc #vlsijobs

We’re #hiring!

We’re hiring a Leader for our ASIC team in #Bangalore.
If you love challenges, are comfortable in the boardrooms of #fortune500 firms, and have a firm grasp of #SoC #verification #testbench architecture, we’d like to talk to you.

You will lead a 300+ team of engineers and grow this unit to over 500 engineers while also giving them direction as we create industry-first solutions for our clients

MosChip is #hiring for below Positions.

1) #Build and #integration (Android) #hyderabad
Experience - 3 to 5 Years
Job Description :
- Experience on #C, #continuousintegration.
- Working experience with #GIT, #gerrit
- Hands on experience on #Shell, #bash #python scripting
- Knowledge on #Androidbuild systems.

2) #SoftwareDeveloepr - #freertos #Bangalore
Experience - 3 to 5 Years
Job Description :
- Experience on #C Programming, #Soc, chip development.
- Hands on experience with #freertos.
-Working Knowledge on #displayports #HDMI #displaydrivers
- Exposure on #RTOS #fpga #jtag #lauterbach

Interested applicants can share their resumes to
manasa.kalla@moschip.com

We are Hiring!!! #TRUECHIP

#Hiring #IP & #SOC #Verification Engineers
Experience: 1.5+ years(Relevant Experience- Excluding internships & trainings)
Notice Period: Immediate to 1 Month
Location: #Bangalore/ #Noida/ #Hyderabad/ #Pune
Interested candidates can share their resume at, medha.gaur@truechip.net

Hiring for one of our client in Bangalore for Design Verification role with US based product development company.
#designverification #soc #IP #UVM, #OVM #RTL, #ARMbased
Job Location: Bangalore
Company: US based MNC Product based company
Experience required - 5+ years Sr Design Verification
10+ years for Lead design verification
15+ years of Manager design verification

Have you developed SOC-level test benches & what components of test bench did you developed?
Have you Verified ARM-based IP/SOC ?
Have you created SOC-level test-cases and debugged them.
Have you developed IP-level test benches ? If so, what components of test bench did they develop expertise with UVM verification methodology ? i.e
How many UVM test benches and/or verification components did you created ?
If anyone having the experience into above mentioned questions, please share your resume at isha@eftihiaindia.com.

Hi All,

Come! be a Part of our wonderful team and grab the opportunity to build a fantastic career with team sisoc.

We have below urgent requirements.

1.#soc or #IP Verification Engineer
2. #physicaldesign Engineer

Experience - 1Year to 20Years

Notice Period - immediate to Two Weeks

Work Locations - Bengaluru and Hyderabad

Salary -Hike on current and best in industry(Not a Constraint)

Please like, comment & share this post so that it can reach the deserving candidates

Interested, Kindly share resumes to surendra.potti@sisocsemi.com

Hi All,
Greetings from ACL Digital!!
Hiring for VLSI Engineers for Bangalore and Hyderabad locations.

SOC/ IP Verification - 5+ years
Physical Design- 5+ years
DFT Engineer- 5+ years
ASIC RTL Design- 8+ years

#UVM #Verilog #SV #SOC #IP #PCIE #ASIC #VLSI #physicaldesign #sta #lvs #drc #lint #cdc #asicdesign
Kindly share resumes to chiranjeevi.k@acldigital.com