We are hiring Design Engineer in Singapore. (Exclusively who are in #singapore )

Candidate must have digital background along with PnR & timing closure analysis exposure.
#Locals preferred & Open for new graduates with similar background. Training provided.
Experience: 0-3 Years

Job Description
- Responsible for developing optimal circuit solutions using advanced technology nodes that enables better design performance, with improved area/power tradeoffs
- Responsible for developing of standard cell source database and to perform cell modelling, which includes timing, functional and power models etc
- Responsible for developing and updating the standard cell design regression flows
- Engage with design teams to understand new library cell requirements such as static timing analysis, EMIR and P&R requirements
- Maintenance of the standard cell source database and regression platform
- Verification of functionality, performance, and power of all deliverables

Interested Share your CV to harika.badri@sventl.com