XILINX,Hyderabad Hiring engineers with the following skills.

1)Physical design Manager :13-18Yrs
2)STA : (13+years)
3)FPGA Prototyping,Emulation:12+Yrs
4) IP Verification Engineers :5+Yrs
5) Post Silicon validation ,PCIE: 7+Yrs
6) PCB Package : 12+Yrs
7) DDR Verification :5+Yrs
8) MIPI Verification : 6+Yrs
9) Coherency Verification :12+Yrs
10)EDA Software Engineer :3+Yrs
11) Emulation Lead :13+yrs
12) RTL Design :4+Yrs
13) Embedded Device driver developer : 7+Yrs
14) Physical Design : 5+Yrs
15)Machine learning :4+Yrs

# #verification #pcie #systemverilog #uvm #systemverilog #ethernet #xilinxhyderabad #physicaldesign #sta #timinganalysis #fpgaprototype #fpgavalidation #pnrcad #rtldesign #dft #fullcustomdesign

Interested candidates can reachout to shalini.recharla@xilinx.com

We have job openings with leading product based companies for the below skills-at Bangalore.

Requirements:

ASIC Design Manager: 15+yrs
ASIC Verification Manager: 13+yrs
ASIC Design: 6+yrs
Circuit Design: 5+years
Verification: 5+yrs
Physical Verification(AE): 6+yrs
DFT Engineer: 4+yrs
PCB Design(AE): 4+yrs

Work Location: Bangalore

If interested candidates please share their CV to my mail id - daicy.ramesh@careernet.co.in

#vlsijobs #semiconductors #fulltimejob #design #rtldesign #sv #ddr #pcie #uvm #physicalverification #asic #dft #pcbdesign #bangalorejobs

Job opportunity with the "EDA Market Leader".
Job Profile- DFT FAE
Experience- 5 to 15 Yrs
Location- Bangalore

Job Details:
You have served in Applications, Design or Product Engineering roles in Individual or leadership capacity.
You have In-depth understanding of Design for Test (DFT) architecture & structures including but not limited to scan based test, Compression, ATPG, IJTAG, Memory BIST and Boundary Scan among others.
You possess deep knowledge of RTL, Synthesis, STA with proven Industry track record in the area of VLSI Testing and design for testability.
Prior experience with Tessent family of DFT products will give you an edge.
You have sound communication and problem solving skills, program management skills and hands-on experience with latest DFT technology. You are a Self-starter with ability to operate independently & bring-in collective experience to develop solutions to complex problems.
Proficiency in scripting languages (like Tcl) to build automated flows and design environments will be viewed as an advantage.
Working Operating Systems knowledge: Linux/Sun Solaris.

For more details interested candidates can reach me on bhoomika@teaminfinity.co.in
#dftjobs #FAE #Designfortest #vlsijobs #vlsidesign #DFTFAE #rtldesign

Greetings from Tech_Mahindra-Cerium Systems!!

We are currently Hiring for
Physical Design (5-15years)
#DFT (3-15 years)
#RTLDesign and #Verification(4-15 years)
#Emulation_Engineer (2-15 years)

Location: Bangalore/Chennai/Hyderabad/Vizag/Kocchi/Ahmedabad
/Penang(Malaysia)
( #H1Bvisa will be sponsored)

Interested candidates can share your updated CV to ''sm00728691@techmahindra.com''

Regards,
Shanawaz M

#Wipro currently Hiring for #vlsi #Engineers for below skills
#experience : 4+yrs
#bangalore #cochin #pune #hyderabad #greaternoida

#physicaldesign
#designverification
#verification
#dft
#sta
#rtldesign
#asicdesign
#fpgadesign with #3GPP

Interested Applicants can share resumes to email ID: mohammed.umar3@wipro.com

#Excellent Opportunity For #M.Tech #Trained #Freshers For Noida And Bangalore Location :

1: #RTL Design Engineer ( #Noida Location)
2: #Verification Engineer ( #Noida Location)
3: #DFT Engineer ( #Bangalore Location)
4: #Embedded Engineer ( #Noida Location, #Preferred if you are in #North Location only)
5: #Physical Design Engineers ( #Noida Location, Preferred if you are in #North Location only)

Please share your resume on madhuri.tomar@incise.in
#Incise #embeddedsystems #embeddedjobs #noida #embeddedsoftware #freshersopportunity #vlsijobs #rtldesign #verifications #physicaldesign #freshersjob #fresherhiring

Design Verification | RTL Design | Bangalore | B.E / B.Tech / M.Tech
Greetings from Excelmax Technologies !!!!!
We are hiring for #designverification & #rtldesign engineers #bangalore location.
Exp-3+yrs
Read more » https://bit.ly/3Sdpx8B