#Immediate opportunities for Verification #freshers
Please share and like to help freshers.
Requirements:
- Trained or did an Internship in #Verification.
- Have strong knowledge in System Verilog, #Digital electronics, #Verilog.
- Good communication skills.
- Open for #Noida Location.

If you have all the above requirements, please share your resume on shubhanshi@incise.in

XILINX,Hyderabad Hiring engineers with the following skills.

1)Physical design Manager :13-18Yrs
2)STA : (13+years)
3)FPGA Prototyping,Emulation:12+Yrs
4) IP Verification Engineers :5+Yrs
5) Post Silicon validation ,PCIE: 7+Yrs
6) PCB Package : 12+Yrs
7) DDR Verification :5+Yrs
8) MIPI Verification : 6+Yrs
9) Coherency Verification :12+Yrs
10)EDA Software Engineer :3+Yrs
11) Emulation Lead :13+yrs
12) RTL Design :4+Yrs
13) Embedded Device driver developer : 7+Yrs
14) Physical Design : 5+Yrs
15)Machine learning :4+Yrs

# #verification #pcie #systemverilog #uvm #systemverilog #ethernet #xilinxhyderabad #physicaldesign #sta #timinganalysis #fpgaprototype #fpgavalidation #pnrcad #rtldesign #dft #fullcustomdesign

Interested candidates can reachout to shalini.recharla@xilinx.com

SpicaWorks is hiring the following Skills interested hurry up and share your resume to krishnapriya@spicaworks.com

Design Verification : 4+ years (Strong in SV ,UVM) ( Immediate /Notice Period )
Physical Design : 4+ years ( Immediate /Notice Period )
DFT Engineers : 3+ years ( Immediate /Notice Period )
Physical Verifications : 4+ years ( Immediate /Notice Period )
AMS Verification : 4+ years (Immediate /15 days )

#verification #systemverilog #uvm #pcie #designverification #asicdesign #ovm #dv #ddr #ethernet #socverification #asicverification #physicaldesign #pd #icc #icc2 #primetime #sta #synthesis #DFT #atpg #mbist #physicalverification

Looking out for SOC Design Engineer for AMD, Bangalore. Exp-5-12 years. If interested please send your resume to shobana.kannan@amd.com
#AMD #Hiring #DV #Verification #DesignVerification #Bangalore

Greetings from Cerium-TechMahindra!

Immediate hiring for

#Verification
#Memory Layout
#Memory Design
#RTL Design
#Physical Design
#DFT
#FPGA

Experience: 3+years
Work Location: Bangalore/Hyderabad/Chennai/Kochi/Ahmedabad/Vizag

If interested, please share your updated resume on gk00725438@techmahindra.com

Greetings from Tech_Mahindra-Cerium Systems!!

We are currently Hiring for
Physical Design (5-15years)
#DFT (3-15 years)
#RTLDesign and #Verification(4-15 years)
#Emulation_Engineer (2-15 years)

Location: Bangalore/Chennai/Hyderabad/Vizag/Kocchi/Ahmedabad
/Penang(Malaysia)
( #H1Bvisa will be sponsored)

Interested candidates can share your updated CV to ''sm00728691@techmahindra.com''

Regards,
Shanawaz M

Dear All,
#Techmahindra #hiring #Verification Engineer
SOC/IP Verification JD:
Design and develop test benches using HVLs like System Verilog
Deep expertise in Verification Methodologies like UVM, OVM, VMM
Knowledge of ARM based SoC verification / Interface protocols like Ethernet, PCIe, USB, SATA/SOC verification is essential
Should have experience in creating test plans
Familiarity with scripting languages
#experience -3 to 15Yrs
If interested, please share your updated resume on RT00728931@Techmahindra.com

#Wipro currently Hiring for #vlsi #Engineers for below skills
#experience : 4+yrs
#bangalore #cochin #pune #hyderabad #greaternoida

#physicaldesign
#designverification
#verification
#dft
#sta
#rtldesign
#asicdesign
#fpgadesign with #3GPP

Interested Applicants can share resumes to email ID: mohammed.umar3@wipro.com

Arm Bangalore: Hiring for Architecture Verification Engineer 3-12Yrs
Reach me @ Srinivas.kr@arm.com

Role & Responsibilities
Understand architecture specifications, carry out investigations and feasibility studies, develop verification strategy and contribute to development of compliance product
Design verification testcases/scenarios in assembly/C/HVL and higher abstraction languages using automation techniques as needed
Excellent verbal and written communication skills
Self-motivated and willing to take up additional responsibilities to contribute to the team’s success.

Qualification & Experience
Btech/B.S. or MTech/M.S./PhD in Computer Engineering/Computer Science or Electronics Engineering
3-12 Years of engineering experience (CPU/complex IP verification is a plus)

Desirable skills
Strong understanding of basic computer architecture
Good in logical programming using C/C++/ Assembly with experience in adopting software engineering best practices.
Familiar with verification process such as Test Plan development, Testcase development
Familiarity of Unix / Linux working environment
Experience in CPU verification would be a plus
#wearegrowing #hiring #architecture #assembly #computerarchitecture #cpu #cpus #verification #testplanning #x86 #arm #bangalorejobs #cpuverification

#Excellent Opportunity For #M.Tech #Trained #Freshers For Noida And Bangalore Location :

1: #RTL Design Engineer ( #Noida Location)
2: #Verification Engineer ( #Noida Location)
3: #DFT Engineer ( #Bangalore Location)
4: #Embedded Engineer ( #Noida Location, #Preferred if you are in #North Location only)
5: #Physical Design Engineers ( #Noida Location, Preferred if you are in #North Location only)

Please share your resume on madhuri.tomar@incise.in
#Incise #embeddedsystems #embeddedjobs #noida #embeddedsoftware #freshersopportunity #vlsijobs #rtldesign #verifications #physicaldesign #freshersjob #fresherhiring

We’re #hiring!

We’re hiring a Leader for our ASIC team in #Bangalore.
If you love challenges, are comfortable in the boardrooms of #fortune500 firms, and have a firm grasp of #SoC #verification #testbench architecture, we’d like to talk to you.

You will lead a 300+ team of engineers and grow this unit to over 500 engineers while also giving them direction as we create industry-first solutions for our clients